The use of complex software algorithms to improve the experiences of device users places increasing demands on the computing capabilities of such devices. Complex algorithms may be used for computer vision, three-dimensional displays, programmable cameras, high definition video and audio, and so forth. Main CPUs, even in multiple core configurations, are hard pressed to meet the demands of these algorithms because of thermal and power limitations.
One increasingly popular response to this problem is to provide distributed auxiliary computing resources that can provide special purpose capabilities that demonstrate higher performance and lower power consumption. Such auxiliary resources may include graphics processing units (GPUs), digital signal processors (DSPs), single instruction, multiple data (SIMD) extensions, and other “helper” cores such as special purpose accelerators.